OpenFC - an Open FPGA Cluster Toolkit

About this project

This framework provides easy access to:

User-built accelerators can be designed in C++ with Vivado HLS (or Intel HLS) in less board dependent style. The framework also provides an easy-to-use streaming DMA API for host C++ code.

Recent updates:


Supported FPGA Cards

Support status of SVN trunk:

FPGA DeviceBoardFeature status
PCIeSerial TransceiverPartial Reconf
Kintex-7Xilinx KC705RIFFA Gen1 x8/XDMA Gen2 x8OKOK
Digilent NetFPGA-1G-CMLRIFFA Gen2 x4
Kintex UltrascaleAvnet KU040 Dev BoardN/A
Xilinx KCU1500XDMA Gen3 x8Coming soon
Virtex Ultrascale+Xilinx Alveo U50XDMA Gen3 x8
Zynq Ultrascale+Xilinx ZCU102 (planned)
Arria 10 GXGidel HawkEye-40GPRIFFA Gen2 x8OK (on trunk)
Cyclone 10 GXIntel Cyclone 10 GX Dev BoardRIFFA Gen2 x4Coming soonOK (on trunk)

Source code SVN repository:


Acknowledgements and License

RIFFA DMA contoller is included in this project, with patches to follow-up with the recent version of the Vivado/Quartus design suite and current Linux kernel. RIFFA DMA engine and its driver are provided under the original license.

The license of source code (except the RIFFA DMA controller):

"THE BEER-WARE LICENSE" (Revision 42): <> wrote this file. As long as you retain this notice, you can do whatever you want with this stuff. If we meet someday, and you think this stuff is worth it, you can buy me a beer in return Yasunori Osana at the University of the Ryukyus, Japan.

Attach file: filenoname.png 7 download [Information]

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Last-modified: 2023-10-12 (Thu) 07:05:09