OpenFC - an Open FPGA Cluster Toolkit
This framework provides easy access to:
User-built accelerators can be designed in C++ with Vivado HLS (or Intel HLS) in less board dependent style. The framework also provides an easy-to-use streaming DMA API for host C++ code.
Support status of SVN trunk:
FPGA Device | Board | Feature status | ||
PCIe | Serial Transceiver | Partial Reconf | ||
Kintex-7 | Xilinx KC705 | RIFFA Gen1 x8/XDMA Gen2 x8 | OK | OK |
Digilent NetFPGA-1G-CML | RIFFA Gen2 x4 | |||
Kintex Ultrascale | Avnet KU040 Dev Board | N/A | ||
Xilinx KCU1500 | XDMA Gen3 x8 | Coming soon | ||
Virtex Ultrascale+ | Xilinx Alveo U50 | XDMA Gen3 x8 | ||
Zynq Ultrascale+ | Xilinx ZCU102 (planned) | |||
Arria 10 GX | Gidel HawkEye-40GP | RIFFA Gen2 x8 | OK (on trunk) | |
Cyclone 10 GX | Intel Cyclone 10 GX Dev Board | RIFFA Gen2 x4 | Coming soon | OK (on trunk) |
Source code SVN repository: https://lut.eee.u-ryukyu.ac.jp/svn/openfc/
RIFFA DMA contoller is included in this project, with patches to follow-up with the recent version of the Vivado/Quartus design suite and current Linux kernel. RIFFA DMA engine and its driver are provided under the original license.
The license of source code (except the RIFFA DMA controller):
"THE BEER-WARE LICENSE" (Revision 42): <yasu@prosou.nu> wrote this file. As long as you retain this notice, you can do whatever you want with this stuff. If we meet someday, and you think this stuff is worth it, you can buy me a beer in return Yasunori Osana at the University of the Ryukyus, Japan.