OpenFC - an Open FPGA Cluster Toolkit
Start:
[[OpenFC - an Open FPGA Cluster Toolkit]]
* About this project [#n7831f89]
This framework provides easy access to:
- PCI Express and high-speed (10+Gbps) serial FPGA-to-FPG...
-- Including Xilinx Aurora-compatible interconnect on Int...
- User-built accelerators with streaming I/O interface
- Stream routing mechanism to allow multiple accelerators...
- Partial reconfiguration feature to load user modules
User-built accelerators can be designed in C++ with Vivad...
** Recent updates: [#ic4ad42b]
- Cyclone/Arria 10 GX Partial Reconfiguration support (Ja...
* Requirements [#x883e32f]
- Host PC(s):
-- with an FPGA card on its PCI Express slot
-- Running Linux (x86_64, kernel 4.x is supported)
--- ARM64 Host (ZynqMP SoC) will come soon!
- In multi-FPGA use case:
-- FPGA cards have to be connected by SFP+ or coaxial cab...
- To build FPGA design:
-- Xilinx FPGAs: Vivado 2018.3 or later
-- Intel FPGAs: Quartus Prime Pro 19.1 or later
** Supported FPGA Cards [#zf4d4d4b]
Support status of SVN trunk:
|FPGA Device| Board |>|>| Feature status|h
|~|~| PCIe | Serial Transceiver | Partial Reconf |h
|Kintex-7 |[[Xilinx KC705>Boards/Xilinx KC705]]...
|~| [[Digilent NetFPGA-1G-CML>Boards/Dig...
|Kintex Ultrascale |[[Avnet KU040 Dev Board>Boards/Avnet...
|~| Xilinx KCU1500 ...
|Virtex Ultrascale+ | Xilinx Alveo U50 ...
|Zynq Ultrascale+ | Xilinx ZCU102 (planned) | | | |
| Arria 10 GX | Gidel HawkEye-40GP | RIFFA Gen2 x8 ...
| Cyclone 10 GX | [[Intel Cyclone 10 GX Dev Board>Boa...
-- More card will be supported.
Source code SVN repository: https://lut.eee.u-ryukyu.ac.j...
* Documentations [#zac584dd]
- [[OpenFC Architecture]]
- [[Quickstart with Xilinx KC705]] or Intel Cyclone 10 card
- [[Building custom Stream PE with Vivado HLS]]
- FPGA Board Porting Guide
* Acknowledgements and License [#d1b04ca0]
[[RIFFA DMA contoller:https://github.com/KastnerRG/riffa]...
The license of source code (except the RIFFA DMA controll...
> "THE BEER-WARE LICENSE" (Revision 42): <yasu@prosou.nu...
End:
[[OpenFC - an Open FPGA Cluster Toolkit]]
* About this project [#n7831f89]
This framework provides easy access to:
- PCI Express and high-speed (10+Gbps) serial FPGA-to-FPG...
-- Including Xilinx Aurora-compatible interconnect on Int...
- User-built accelerators with streaming I/O interface
- Stream routing mechanism to allow multiple accelerators...
- Partial reconfiguration feature to load user modules
User-built accelerators can be designed in C++ with Vivad...
** Recent updates: [#ic4ad42b]
- Cyclone/Arria 10 GX Partial Reconfiguration support (Ja...
* Requirements [#x883e32f]
- Host PC(s):
-- with an FPGA card on its PCI Express slot
-- Running Linux (x86_64, kernel 4.x is supported)
--- ARM64 Host (ZynqMP SoC) will come soon!
- In multi-FPGA use case:
-- FPGA cards have to be connected by SFP+ or coaxial cab...
- To build FPGA design:
-- Xilinx FPGAs: Vivado 2018.3 or later
-- Intel FPGAs: Quartus Prime Pro 19.1 or later
** Supported FPGA Cards [#zf4d4d4b]
Support status of SVN trunk:
|FPGA Device| Board |>|>| Feature status|h
|~|~| PCIe | Serial Transceiver | Partial Reconf |h
|Kintex-7 |[[Xilinx KC705>Boards/Xilinx KC705]]...
|~| [[Digilent NetFPGA-1G-CML>Boards/Dig...
|Kintex Ultrascale |[[Avnet KU040 Dev Board>Boards/Avnet...
|~| Xilinx KCU1500 ...
|Virtex Ultrascale+ | Xilinx Alveo U50 ...
|Zynq Ultrascale+ | Xilinx ZCU102 (planned) | | | |
| Arria 10 GX | Gidel HawkEye-40GP | RIFFA Gen2 x8 ...
| Cyclone 10 GX | [[Intel Cyclone 10 GX Dev Board>Boa...
-- More card will be supported.
Source code SVN repository: https://lut.eee.u-ryukyu.ac.j...
* Documentations [#zac584dd]
- [[OpenFC Architecture]]
- [[Quickstart with Xilinx KC705]] or Intel Cyclone 10 card
- [[Building custom Stream PE with Vivado HLS]]
- FPGA Board Porting Guide
* Acknowledgements and License [#d1b04ca0]
[[RIFFA DMA contoller:https://github.com/KastnerRG/riffa]...
The license of source code (except the RIFFA DMA controll...
> "THE BEER-WARE LICENSE" (Revision 42): <yasu@prosou.nu...
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